ByMia Carla 2019-05-26 615
For Computex and E3, AMD has scheduled two events where there will be news about Ryzen 3000 and Navi. Until then the rumour mill will continue to simmer and from Asia comes now a probably real block diagram, which should confirm PCI Express 4.0 for Ryzen 3000 and X570. The source HKEPC is considered to be reasonably trustworthy and it is not assumed that the information is forged.
The Hong Kong Chinese claim to have received the diagram from a confidential source and this shows that Ryzen 3000 as Matisse will have 24 PCI Express lanes in 4.0 format. These are divided into the usual 16 lanes for a graphics card, 4 lanes for connecting the X570 controller hub and the remaining 4 lanes for mass storage. The CPU also provides not surprisingly dual-channel memory and four USB 3.1 ports in Gen 2 format.
There is also an upgrade to 4.0 for the "chipset", which then communicates with the CPU in this format if it is a Matisse model. Meanwhile, it remains unclear how exactly the distribution of the lanes provided by the controller hub will be. The block diagram does not go into detail here. The chipset already caused some excitement because pictures with active cooling made the rounds and that didn't go down well. It was assumed that the PCI-E-4.0 upgrade would increase heat generation. It remains to be seen what all this will look like in the end.
At Computex at the latest, there will be clarification, because the mainboard manufacturers will certainly show their products - if only in the back room. Something should definitely seep out there.
Apropos Ryzen 3000: The APUs codenamed Picasso are still based on old silicon and will therefore not support PCI Express 4.0. This has been discussed several times, but I would like to mention it again.
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